; ; ********************************************************* ; * * ; * Magic Sinewave Delta 28 simulation for PIC 16F628A * ; * Version 5.07 copyright c 2003 by Don Lancaster * ; * and Synergetics, Box 809 Thatcher AZ (928) 428-4073 * ; * * ; * http://www.tinaja.com/magsn01.asp don@tinaja.com * ; * ALL commercial and media rights FULLY reserved. * ; * * ; ********************************************************* ; A highly efficiency power frequency sinewave synthesizer that is fully ; three phase compatible and ZEROS (!) all harmonics from 2 through 22. ; Harmonics 23 and 25 are fairly strong and will require low pass filtering. ; Further support at http://www.tinaja.com/magsn01.asp or don@tinaja.com ; There are 28 pulses per cycle. Equal to 56 half-bridge switching events. ; Magic sinewaves GUARANTEE the fewest switching events for the maximum ; number of harmonics rejected. And thus are the most efficient possible. ; See tutorials at http://www.tinaja.com/magsn01.asp ; 10 MHz clock in = 60 Hertz sinewave out. ; Change clock frequency to change output frequency. ; Note that the UART is not usable owing to variable clock. ; Certain other 16F628A features may be limited by the extreme timing required. ; Preliminary version may still includes bugs. ; Preliminary version is only partially populated. ; Preliminary version is not yet distortion optimized. ; Subject to further improvement and optimizations. ; Custom development services via don@tinaja.com ; Recommended demo amplitude is 0.53. ; 100 constant amplitude steps plus zero. Steps 01, 02, and 03 are not usable. ; These are all less than 0.1 percent power. They can be provided in a later version. ; This preliminary demo/development .ASM file intended primarily for use with the ; PIC Simulator IDE by http://www.oshonsoft.com ; MEMORY MAP: ; page 0 - startup plus main CYCLE sequence, ; page 1 - continuation of main CYCLE sequence plus service subs ; page 2 - additional service subs ; page 3 - Precision time delay ; page 4 - Delay tables A and B ; page 5 - Delay tables C and D ; page 6 - Delay tables E and F ; page 7 - Delay tables G and H ; Approximately 230 contiguous unused bytes remain on page two. Four blocks of ; approximately 40 bytes each remain unused on pages 4 through 7. ; Approximately 62 cycles remain available for additional UPDATE features. ; Current update rate is once each sixty degrees maximum in SLEW mode. ; In PULSE mode, minimum UPDATE pulse width is approximately 30 degrees on ; and 30 degrees off. Equal to 3 milliseconds at 60 Hertz. ; Current ON-OFF shutdown may include sixty degrees of latency. ; All sequences are believed fully equalized and transient free. ; PIN ASSIGNMENTS ; A0 - INPUT - RUN - RUN if low; STOP if high. May have 60 degree latency. ; A1 - INPUT - PULSE - Low = continuous; High = one count up/down per pulse. ; A2 - INPUT - DOWN - Reduces amplitude if not zero. High = advance ; A3 - INPUT - UP - Increases amplitude if not 100. High = retard ; B0 - OUTPUT - A+ - Phase A 0 degree positive output ; B1 - OUTPUT - A- - Phase A 0 degree negative output ; B2 - OUTPUT - B+ - Phase B 120 degree positive output ; B3 - OUTPUT - B- - Phase B 120 degree negative output ; B4 - OUTPUT - C+ - Phase C 240 degree positive output ; B5 - OUTPUT - C- - Phase C 240 degree negative output ; Zero is presently LOW on all outputs. Negative outputs can be inverted if ; required by the half bridge drivers. Requires different version. ; NOTE: B0 may also be routed to a 100K resistor and 10 microfarad low pass ; filter to provide a DC output equal to ONE HALF the rms output amplitude. ; Outputs B0 and B1 may also be used for single phase output. But note that ; A best efficiency version would reduce additional harmonics. ; Maximum update rate in slew mode: 360 amplitudes per second. ; Minimum input pulse width is 3 milliseconds on and off at 60 Hertz. ; REGISTERS: AMPLIT EQU 0x20 ; Desired ms amplitude SLEWCN EQU 0x21 ; Slew rate counter sets cycles per change. HANDSH EQU 0x22 ; handshake flag in pulse mode 1=old 0=ready ; bit1 = upflag bit0 = downflag DLYA EQU 0x23 ; prestored delay values allow more amplitudes. DLYB EQU 0x24 ; amplitude can be updated every 30 degrees. DLYC EQU 0x25 DLYD EQU 0x26 DLYE EQU 0x27 DLYF EQU 0x28 DLYG EQU 0x29 DLYH2 EQU 0x2A ; DATA VALUES UP EQU 03 ; portline on PORTA for UP high=higher amp DN EQU 02 ; portline on PORTA for DOWN high=lower amp PULSE EQU 01 ; low=continuous high=one count per pulse RUN EQU 00 ; portline on PORTA for STOP-RUN Low=Run SLEWR EQU 3 ; slew rate 1=360 hz 6=60 hz 36=10 hz 72=5hz 180=2 hz APADVAL EQU 54 ; fixed padding for double A delay DPADVAL EQU 41-7 ; fixed padding for D delay OPENAMP EQU 53 ; opening amplitude for AMPLIT (53 recommended here) ; ENTRY happens on a reset or if an invalid amplitude results. ENTRY: ORG 0000 BCF PCLATH,3 ; low memory BCF PCLATH,4 GOTO SETUP ORG 0004 RETFIE SETUP: CLRF PORTA ; initialize porta CLRF PORTB ; initialize portb MOVLW 0x07 ; turn comparators off MOVWF CMCON ; enable A pins for I/O BSF STATUS,RP0 ; set bank1 BCF STATUS,RP1 MOVLW 0x0F ; make 4 a ports inputs MOVWF TRISA MOVLW 0x00 ; make 6 b ports outputs MOVWF TRISB BCF STATUS,RP0 ; set bank 0 BCF STATUS,RP1 CLRF PORTB ; verify zero outputs CLRF HANDSH ; clear handshake flags. low=ok NEXTCYC MOVLW OPENAMP ; init to amplitude (53 recommended here) MOVWF AMPLIT ; and save MOVLW 01 ; initialize slew rate counter MOVWF SLEWCN ; CALL GRABDLY ; init delay values (useful for debug) ; %%%%%%%%%%%% GROUP OUTPUT CYCLE SEQUENCE %%%%%%%%%%%% ; CYCLE code is unwrapped where necessary to realize very high or very low ; amplitudes; uses subroutines otherwise. ; Group A is preliminary delay. Also update and grabs delays A-D. ; It realizes all amplitudes as subroutine. ; The ending and beginning A delays of each 60 degree intervals are combined. ; A "double A" delay happens on reset with zero outpus. CYCLE CALL A2X0 ; input, expand, and stall-2 200 [OVH=202] MOVLW 0x24 ; a000 + bpos + cneg 1 MOVWF PORTB ; write new port pattern 1 ; Group B is pulse p5 + p6% ; It realizes all amplitudes as subroutine. B0L CALL BX ; expand and stall 15/20 [OVH=17/22] MOVLW 0x21 ; apos + b000 + cneg 1 MOVWF PORTB ; write new port pattern 1 ; Group C is pulse p1 + p6% ; Amplitudes 1 and 2 not realizable. 3 possibly approximate. C0L MOVF DLYC,0 ; Get 8-bit delay value 1 OVH=9 p1 and p6% CALL STALL ; Do 8-bit only delay 6 MOVLW 0x00 ; all ports off 1 MOVWF PORTB ; write new port pattern 1 ; Group D is the interpulse space and grabs delays E-H. ; It realizes all amplitudes as subroutine. D0L CALL DX ; grab expand and stall 59 [OVH=61] MOVLW 0x21 ; apos + b000 + cneg 1 MOVWF PORTB ; write new port pattern 1 ; Group E is pulses p2 and p7%. ; Amplitudes 1, 2 and 3 are not realizable. 4 is an approximation ; OVH can be reduced by one with hairy pipelining and bit clearing. E0L MOVF DLYE,0 ; Get 8-bit delay value 1 OVH=9 p2 and p7% CALL STALL ; Do 8-bit only delay 6 MOVLW 0x24 ; a000 + bpos + cneg 1 MOVWF PORTB ; write new port pattern 1 ; Group F is pulses p4 and p7%. ; Amplitude 1 is not realizable when used as subroutine. F0L CALL FX ; grab expand and stall 15/20 [OVH=15/20] P4 and P7% MOVLW 0x21 ; apos + b000 + cneg 1 MOVWF PORTB ; write new port pattern 1 ; Group G is pulse p3 + p7% G0L CALL GX ; expand and stall 15/20 [OVH=17/22] MOVLW 0x00 ; all ports off 1 MOVWF PORTB ; write new port pattern 1 ; Group H2 is twice ending pulse delay. Special treatment is needed for ; amplitudes 99 [26 cycles] and 100 [8 cycles]. HOC MOVF AMPLIT,0 ; get amplitude 1 [OVH = 8*/26*/29/33] SUBLW 100 ; test for 100 1 BTFSC STATUS,Z ; amplitude 100? 1/2 GOTO HOC1 ; yes, 100 2 CALL HX ; use sub if not 100 [19/22/26] HOC1 NOP ; burn 1 cycle 1 MOVLW 0x24 ; aoff + bpos + cneg 1 MOVWF PORTB ; 1 ; and wind down the next 30 degrees G0R CALL GX ; expand and stall MOVLW 0x21 ; apos boff cneg MOVWF PORTB ; write new port pattern F0R CALL FX ; grab expand and stall MOVLW 0x24 ; aoff + bpos + cneg MOVWF PORTB ; write new port pattern E0R MOVF DLYE,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern D0R CALL DX ; grab expand and stall MOVLW 0x24 ; aoff + bpos + cneg MOVWF PORTB ; write new port pattern C0R MOVF DLYC,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x21 ; apos boff cneg MOVWF PORTB ; write new port pattern B0R CALL BX ; expand and stall MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern ; first 60 degrees complete here except for half of A ; starting 60 to 120 degrees A1L CALL A2X ; input, expand, and stall-2 Note +2 for loop MOVLW 0x21 ; apos + b000 + cneg MOVWF PORTB ; write new port pattern B1L CALL BX ; expand and stall MOVLW 0x09 ; apos + bneg + c000 MOVWF PORTB ; write new port pattern C1L MOVF DLYC,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern D1L CALL DX ; grab expand and stall MOVLW 0x09 ; apos + bneg + c000 MOVWF PORTB ; write new port pattern E1L MOVF DLYE,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x21 ; apos + b000 + cneg MOVWF PORTB ; write new port pattern F1L CALL FX ; grab expand and stall MOVLW 0x09 ; apos + bneg + c000 MOVWF PORTB ; write new port pattern G1L CALL GX ; expand and stall MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern H1C MOVF AMPLIT,0 ; get amplitude SUBLW 100 ; test for 100 BTFSC STATUS,Z ; amplitude 100? GOTO H1C1 ; yes, 100 CALL HX ; use sub if not 100 H1C1 NOP ; burn 1 cycle MOVLW 0x21 ; apos + b000 + cneg MOVWF PORTB ; G1R CALL GX ; expand and stall MOVLW 0x09 ; apos + bneg + c000 MOVWF PORTB ; write new port pattern F1R CALL FX ; grab expand and stall MOVLW 0x21 ; apos + b000 + cneg MOVWF PORTB ; write new port pattern E1R MOVF DLYE,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern D1R CALL DX ; grab expand and stall MOVLW 0x21 ; apos + b000 + cneg MOVWF PORTB ; write new port pattern C1R MOVF DLYC,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x09 ; aapos + bneg + c000 MOVWF PORTB ; write new port pattern B1R CALL BX ; expand and stall MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern ; 60 to 120 degrees complete here except for half of A ; starting 120 to 180 degrees A2L CALL A2X ; input, expand, and stall-2 MOVLW 0x09 ; apos + bneg + c000 MOVWF PORTB ; write new port pattern B2L CALL BX ; expand and stall MOVLW 0x18 ; a000 + bneg + cpos MOVWF PORTB ; write new port pattern C2L MOVF DLYC,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern D2L CALL DX ; grab expand and stall MOVLW 0x18 ; a000 + bneg + cpos MOVWF PORTB ; write new port pattern E2L MOVF DLYE,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x09 ; apos + bneg + c000 MOVWF PORTB ; write new port pattern F2L CALL FX ; grab expand and stall MOVLW 0x18 ; a000 + bneg + cpos MOVWF PORTB ; write new port pattern G2L CALL GX ; expand and stall MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern H2C MOVF AMPLIT,0 ; get amplitude SUBLW 100 ; test for 100 BTFSC STATUS,Z ; amplitude 100? GOTO H2C1 ; yes, 100 CALL HX ; use sub if not 100 H2C1 NOP ; burn 1 cycle MOVLW 0x09 ; apos + bneg + c000 MOVWF PORTB ; G2R CALL GX ; expand and stall MOVLW 0x18 ; a000 + bneg + cpos MOVWF PORTB ; write new port pattern F2R CALL FX ; grab expand and stall MOVLW 0x09 ; apos + bneg + c000 MOVWF PORTB ; write new port pattern E2R MOVF DLYE,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern D2R CALL DX ; grab expand and stall MOVLW 0x09 ; apos + bneg + c000 MOVWF PORTB ; write new port pattern C2R MOVF DLYC,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x18 ; a000 + bneg + cpos MOVWF PORTB ; write new port pattern B2R CALL BX ; expand and stall MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern ; 120 to 180 degrees complete here except for half of A ; starting 180 to 210 degrees A3L CALL A2X ; input, expand, and stall-2 MOVLW 0x18 ; a000 + bneg + cpos MOVWF PORTB ; write new port pattern B3L CALL BX ; expand and stall MOVLW 0x12 ; aneg + b000 + cpos MOVWF PORTB ; write new port pattern C3L MOVF DLYC,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern D3L CALL DX ; grab expand and stall MOVLW 0x12 ; aneg + b000 + cpos MOVWF PORTB ; write new port pattern E3L MOVF DLYE,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x18 ; a000 + bneg + cpos MOVWF PORTB ; write new port pattern F3L CALL FX ; grab expand and stall MOVLW 0x12 ; aneg + b000 + cpos MOVWF PORTB ; write new port pattern G3L CALL GX ; expand and stall MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern ; starting 210 to 240 degrees H3C MOVF AMPLIT,0 ; get amplitude SUBLW 100 ; test for 100 BTFSC STATUS,Z ; amplitude 100? GOTO H3C1 ; yes, 100 CALL HX ; use sub if not 100 H3C1 NOP ; burn 1 cycle MOVLW 0x18 ; a000 + bneg + cpos MOVWF PORTB ; G3R CALL GX ; expand and stall MOVLW 0x12 ; aneg + b000 + cpos MOVWF PORTB ; write new port pattern F3R CALL FX ; grab expand and stall MOVLW 0x18 ; a000 + bneg + cpos MOVWF PORTB ; write new port pattern E3R MOVF DLYE,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern D3R CALL DX ; grab expand and stall MOVLW 0x18 ; a000 + bneg + cpos MOVWF PORTB ; write new port pattern C3R MOVF DLYC,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x12 ; aneg + b000 + cpos MOVWF PORTB ; write new port pattern B3R CALL BX ; expand and stall MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern ; 180 to 240 degrees complete here except for half of A ; starting 240 to 270 degrees A4L CALL A2X ; input, expand, and stall-2 MOVLW 0x12 ; aneg + b000 + cpos MOVWF PORTB ; write new port pattern B4L CALL BX ; expand and stall MOVLW 0x06 ; aneg bpos c000 MOVWF PORTB ; write new port pattern C4L MOVF DLYC,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern D4L CALL DX ; grab expand and stall MOVLW 0x06 ; aneg bpos c000 MOVWF PORTB ; write new port pattern E4L MOVF DLYE,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x12 ; aneg + b000 + cpos MOVWF PORTB ; write new port pattern F4L CALL FX ; grab expand and stall MOVLW 0x06 ; aneg bpos c000 MOVWF PORTB ; write new port pattern G4L CALL GX ; expand and stall MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern ; starting 270 to 300 degrees H4C MOVF AMPLIT,0 ; get amplitude SUBLW 100 ; test for 100 BTFSC STATUS,Z ; amplitude 100? GOTO H4C1 ; yes, 100 CALL HX ; use sub if not 100 H4C1 NOP ; burn 1 cycle MOVLW 0x12 ; aneg + b000 + cpos MOVWF PORTB ; G4R CALL GX ; expand and stall MOVLW 0x06 ; aneg bpos c000 MOVWF PORTB ; write new port pattern F4R CALL FX ; grab expand and stall MOVLW 0x12 ; aneg + b000 + cpos MOVWF PORTB ; write new port pattern E4R MOVF DLYE,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern D4R CALL DX ; grab expand and stall MOVLW 0x12 ; aneg + b000 + cpos MOVWF PORTB ; write new port pattern C4R MOVF DLYC,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x06 ; aaneg bpos c000 MOVWF PORTB ; write new port pattern B4R CALL BX ; expand and stall MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern ; 240 to 300 degrees complete here except for half of A ; starting 300 to 330 A5L CALL A2X ; input, expand, and stall-2 MOVLW 0x06 ; aneg bpos c000 MOVWF PORTB ; write new port pattern B5L CALL BX ; expand and stall MOVLW 0x24 ; a000 + bpos + cneg MOVWF PORTB ; write new port pattern C5L MOVF DLYC,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern D5L CALL DX ; grab expand and stall MOVLW 0x24 ; a000 + bpos + cneg MOVWF PORTB ; write new port pattern E5L MOVF DLYE,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x06 ; aneg bpos c000 MOVWF PORTB ; write new port pattern F5L CALL FX ; grab expand and stall MOVLW 0x24 ; a000 + bpos + cneg MOVWF PORTB ; write new port pattern G5L CALL GX ; expand and stall MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern ; doing 330 to 360 degrees H5C MOVF AMPLIT,0 ; get amplitude SUBLW 100 ; test for 100 BTFSC STATUS,Z ; amplitude 100? GOTO H5C1 ; yes, 100 CALL HX ; use sub if not 100 H5C1 NOP ; burn 1 cycle MOVLW 0x06 ; aneg bpos c000 MOVWF PORTB ; G5R CALL GX ; expand and stall MOVLW 0x24 ; a000 + bpos + cneg MOVWF PORTB ; write new port pattern F5R CALL FX ; grab expand and stall MOVLW 0x06 ; aneg bpos c000 MOVWF PORTB ; write new port pattern E5R MOVF DLYE,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern D5R CALL DX ; grab expand and stall MOVLW 0x06 ; aneg bpos c000 MOVWF PORTB ; write new port pattern C5R MOVF DLYC,0 ; Get 8-bit delay value CALL STALL ; Do 8-bit only delay MOVLW 0x24 ; a000 + bpos + cneg MOVWF PORTB ; write new port pattern B5R CALL BX ; expand and stall MOVLW 0x00 ; all ports off MOVWF PORTB ; write new port pattern ; 300 to 360 degrees complete here except for half of A GOTO CYCLE ; close loop. Equalized by A2X0. ; %%%%%%%%%%%%% Group CYCLE support subroutines %%%%%%%%%%%%%%% ; The ending and beginning A2 delays are combined to get more update time. ; A2 has a fixed delay consisting of UPDATE and GRABLO and PADD, plus ; a (100-AMPLIT)*14+6 expansion. A2X GOTO A2X0 ; equalizes cycle closing GOTO 2* [OVH=200] A2X0 CALL UPDATE ; check inputs for AMPLIT change 42 CALL GRABDLY ; grab delays A-H for fast access 75 CALL APAD ; provide additional fixed delay 54+6+3 CALL EXPANDA ; expand by (100-AMPLIT)*14 7+ MOVF DLYA,0 ; Get 8-bit delay value 1 CALL STALL ; Do 8-bit only delay 6 RETURN ; and go back (4) BX MOVF AMPLIT,0 ; get amplitude 1 [OVH = 15/20 ] SUBLW 10 ; subtract 10-W for threshold 1 BTFSS STATUS,C ; skip if less than 10 1/2 CALL EXPANDB ; expand by 11*AMPLIT+6 6* P5 and P6% MOVF DLYB,0 ; Get 8-bit delay value 1 CALL STALL ; Do 8-bit only delay 6 RETURN ; and go back (4) ; CX is linear coded DX CALL DPAD ; provide additional fixed delay 41 [OVH=59] CALL EXPANDD ; expand by 16*(100-AMPLIT)+7 7 MOVF DLYD,0 ; Get 8-bit delay value 1 CALL STALL ; Do 8-bit only delay 6 RETURN ; and go back (4) ; EX is linear coded ; FX uses threshold 20 FX MOVF AMPLIT,0 ; get amplitude 1 [OVH = 15/20 ] SUBLW 20 ; subtract 20-W for threshold 1 BTFSS STATUS,C ; skip if less than 20 1/2 CALL EXPANDF ; expand by 8*AMPLIT+6 * 6 P4 and P7% MOVF DLYF,0 ; Get 8-bit delay value 1 CALL STALL ; Do 8-bit only delay 6 RETURN ; and go back (4) ; GX uses threshold 40 GX MOVF AMPLIT,0 ; get amplitude 1 [OVH = 15/20 ] SUBLW 40 ; subtract 40-W for threshold 1 BTFSS STATUS,C ; skip if less than 40 1/2 CALL EXPANDG ; expand by 5*AMPLIT+6 6* P5 and P6% MOVF DLYG,0 ; Get 8-bit delay value 1 CALL STALL ; Do 8-bit only delay 6 RETURN ; and go back (4) ; HX requires special treatment of 100 (already done) and 99... ; Plus expansion truncation required for AMPLIT>87. HX MOVF AMPLIT,0 ; get amplitude 1 [OVH = 19/22/26] SUBLW 99 ; test for 99-H 1 BTFSC STATUS,Z ; skip fancy stuff 1/2 GOTO FIXH99 ; and exit via delay [16] CALL EXPANDH2 ; trunc 8*(10-AMPL) [7/11] MOVF DLYH2,0 ; get 8-bit delay value 1 CALL STALL ; do 8-bit only delay 6* RETURN ; and go back [4] ; %%%%%%%%%%% Group CYCLE EXPANSION Subroutines %%%%%%%%%%%%%%%% ; The EXPANDX modules convert 8-bit data into 12-bit data by adding ; a ramp, a differenced ramp, or a thresholded ramp. Threshold is ; set by the calling routine except for EXPANDH2. ; EXPANDA delays by (100-Amplitude)*14 plus 7 overhead cycles... EXPANDA MOVF AMPLIT,0 ; get amplitude SUBLW 100 ; subtract it FROM 100 LOOPA BTFSC STATUS,Z ; check zero flag INTA RETURN ; return when done CALL INTA ; burn four cycles CALL INTA ; burn four cycles NOP ; burn one cycle ADDLW 0xFF ; count down - here saves an overhead cycle GOTO LOOPA ; and repeat for 14 ; EXPANDB delays by Amplitude*11 plus 6 overhead cycles... EXPANDB MOVF AMPLIT,0 ; get amplitude LOOPB BTFSC STATUS,Z ; check zero flag RETLW 00 ; return when done CALL GOBACKB ; burn four cycles GOTO MOREB ; burn two cycles MOREB ADDLW 0xFF ; count down - here saves an overhead cycle GOTO LOOPB ; and repeat for nine GOBACKB RETURN ; must NOT be RETLW! ; No EXPANDC is presently needed as C data is within 8-bit range. ; EXPANDD delays by (100-Amplitude)*16 plus 7 overhead cycles... EXPANDD MOVF AMPLIT,0 ; get amplitude 1 [OVH=7] SUBLW 100 ; subtract it FROM 100 1 LOOPD BTFSC STATUS,Z ; check zero flag 2 1 RETLW 00 ; -- (4) CALL GOBACKD ; burn 4 cycles CALL GOBACKD ; burn 4 more cycles GOTO MORED ; burn 2 more cycles MORED NOP ; burn 1 more cycle 11 ADDLW 0xFF ; count down - here saves an overhead cycle 1 GOTO LOOPD ; and repeat for sixteen 2 GOBACKD RETURN ; must NOT be RETLW! ; No EXPANDE is presently needed as E data is within 8-bit range. ; EXPANDF delays by Amplitude*8 plus 6 overhead cycles... EXPANDF MOVF AMPLIT,0 ; get amplitude LOOPF BTFSC STATUS,Z ; check zero flag RETLW 00 ; return when done NOP ; burn one cycle GOTO MOREF ; burn two cycles MOREF ADDLW 0xFF ; count down - here saves an overhead cycle GOTO LOOPF ; and repeat for six ; EXPANDG delays by Amplitude*5 plus 6 overhead cycles... EXPANDG MOVF AMPLIT,0 ; get amplitude LOOPG BTFSC STATUS,Z ; check zero flag RETLW 00 ; return when done ADDLW 0xFF ; count down - here saves an overhead cycle GOTO LOOPG ; and repeat for six ; Expand H2 does (100 - AMPLIT)*16 + 11 cycles ONLY IF AMPLIT<87. EXPANDH2 MOVF AMPLIT,0 ; get amplitude 1 [OVH = 7/11*] SUBLW 87 ; is 87-H positive? 1 BTFSS STATUS,C ; 1/2 RETURN ; and go back (4)* MOVF AMPLIT,0 ; get amplitude SUBLW 100 ; subtract it FROM 100 LOOPH BTFSC STATUS,Z ; check zero flag RETURN ; return when done CALL GOBACKH ; burn 4 cycles CALL GOBACKH ; burn 4 more cycles GOTO MOREH ; burn 2 more cycles MOREH NOP ; burn 1 more cycle ADDLW 0xFF ; count down - here saves an overhead cycle GOTO LOOPH ; and repeat for sixteen GOBACKH RETURN ; cycle burner ; FixH99 is a short fixed delay for the special H amplitude 99 case. ; want 26 - (ho= 7) - (hx=5) = 14 FIXH99 CALL GOBACKH ; burn 4 cycles for amplitude 4 CALL GOBACKH ; burn 4 cycles 4 GOTO FIXH99A ; burn 2 cycles 2 FIXH99A RETURN ; return to main H2C (4) ; %%%%%%%%%%%% Update Servicing Subroutines %%%%%%%%%%% ; GRABLDLY preloads the AMPLIT delays into temporary storage registers. GRABDLY MOVLW 04 ; go to data page four 1 [ovh=75] MOVWF PCLATH ; to start tables 1 CALL GETDLYA ; lookup A delay value 7 MOVWF DLYA ; and store 1 CALL GETDLYB ; lookup B delay value 7 MOVWF DLYB ; and store 1 INCF PCLATH,1 ; go to data page five 1 CALL GETDLYC ; lookup C delay value 7 MOVWF DLYC ; and store 1 CALL GETDLYD ; lookup D delay value 7 MOVWF DLYD ; and store 1 INCF PCLATH,1 ; go to data page six 1 CALL GETDLYE ; lookup E delay value 7 MOVWF DLYE ; and store 1 CALL GETDLYF ; lookup F delay value 7 MOVWF DLYF ; and store 1 INCF PCLATH,1 ; go to data page seven 1 CALL GETDLYG ; lookup G delay value 7 MOVWF DLYG ; and store 1 CALL GETDLYH2 ; lookup H*2 delay value 7 MOVWF DLYH2 ; and store 1 MOVLW 03 ; reset to time delay page three 1 MOVWF PCLATH ; 1 RETURN ; (4) ; UPDATE sequence checks for an up or down command and alters AMPLIT if ; needed. Then updates LOWAMP flag. Then validates AMPLIT. ; Then checks for ZERO. Finally checks for RUN. Additional space available ; for fancier actions. ; There are two main UPDATE modes, set by the PULSE input. When in PULSE ; mode, each UP or DN pulse advances ONE count, regardless of length. When ; in SLEW mode, counts continue advancing or declining as long as the UP or ; DN input is high. ; There are two entry points to compensate for phase zero update. ; Code is believed to be fully equalized for all paths. UPDATE BTFSC PORTA,PULSE ; are we in pulse mode? 1 [OVH=42] GOTO PULSEUP ; yes, use single pulse mode 24 GOTO SLEWUP ; no, use slew rate limit or [24] ; VALIDA is entered from SLEWUP or PULSEUP and verifies a valid AMPLIT 0-100. ; This is a safety check that NEVER should happen. VALIDA MOVF AMPLIT,0 ; get amplitude 1 [4] SUBLW 100 ; subtract FROM 100, set C if bad 1 BTFSS STATUS,C ; test for set carry 2 GOTO ENTRY ; reinitialize if bad AMPLIT --- ; FLGRST resets handshake bits when UP or DOWN inputs return low. ; Needed in PULSE mode only, but best left general. FLGRST BTFSS PORTA,UP ; is UP input back to low? [4] BCF HANDSH,1 ; yes reset UP handshake bit BTFSS PORTA,DN ; is DN input back to low BCF HANDSH,0 ; yes, reset DN handshake bit ; NOZERO prevents any output on zero amplitude. Keeps looking for an ; UP command till a nonzero AMPLIT results. NOZERO MOVF AMPLIT,1 ; set zero flag if AMPLIT=0 1 [3] BTFSC STATUS,Z ; 2 GOTO UPDATE ; retry till a new amplitude is set ---- ; NORUN prevents any output if the RUN input is high. Hangs till RUN goes low. ; probably should reverse in final chip. Painful for debug otherwise. ; Presently can have up to 60 degrees latency. NORUN BTFSC PORTA, RUN ; hold if RUN input is low. 2 [2] GOTO NORUN ; --- RETURN ; exit UPDATE (4) [4] ; SLEWUP attempts to alter AMPLIT when requested by UP or DN and when allowed ; by the SLEWCN slewrate counter. Used only in slewrate mode SLEWUP DECFSZ SLEWCN,1 ; decrement slew counter 2 [12] GOTO EQS1 ; equalize 19 if not zero --- MOVLW SLEWR ; reload slew counter 1 MOVWF SLEWCN ; for next countdown 1 CKUPS MOVF AMPLIT,0 ; get amplitude 1 SUBLW 100 ; is it 100? 1 BTFSC STATUS,Z ; z=1 if AMPLIT=100 2 GOTO EQS2 ; or equalize --- UPOKS BTFSC PORTA,UP ; read UP input port bit 1 INCF AMPLIT,1 ; advance if high 1 NOP ; burn 1 cycles to equalize 1 ; bypassed GOTO penalty (1) CKDNS MOVF AMPLIT,1 ; check for zero 1 [12] BTFSC STATUS,Z ; z=1 if AMPLIT=0 2 GOTO EQS3 ; or equalize --- DNOKS BTFSC PORTA,DN ; read DN input port bit 1 DECF AMPLIT,1 ; advance if high 1 NOP ; burn 1 cycle to match pulse 1 DN1 GOTO TOVAL ; burn 2 cycles to match pulse 2 TOVAL GOTO VALIDA ; and continue with UPDATE (4) ; Slew mode equalizing routines... EQS1 MOVLW 9 ; delay 19 - 6 - 4 cycles CALL STALL ; via usual long delay sub GOTO VALIDA ; continue UPDATE at VALIDA EQS2 GOTO CKDNS ; burn 2 cycles EQS3 NOP ; not critical - NOZERO dominates! GOTO EQS3A ; burn 2 cycles EQS3A NOP ; burn 1 cycle GOTO VALIDA ; continue UPDATE at VALIDA ; PULSEUP attempts to alter AMPLIT when requested by UP or DN but only permitting ; ONE advance or retard per input pulse regardless of length. Used only in pulse ; mode. PULSEUP BTFSC HANDSH,1 ; is this a new pulse? 2 [11] GOTO EQP1 ; equalize if old --- CKUPP MOVF AMPLIT,0 ; get amplitude 1 SUBLW 100 ; is it 100? 1 BTFSC STATUS,Z ; z=1 if AMPLIT=100 2 GOTO EQP2 ; or equalize --- UPOKP BTFSS PORTA,UP ; read UP input port bit 2 GOTO EQP3 ; INCF AMPLIT,1 ; advance if high 1 BSF HANDSH,1 ; and set lockout flag 1 NOP ; equalize equalize 1 CKDNP BTFSC HANDSH,0 ; is this a new pulse? 2 [13] GOTO EQP4 ; equalize if old --- MOVF AMPLIT,1 ; check for zero 1 BTFSC STATUS,Z ; z=1 if AMPLIT=0 2 GOTO EQP5 ; equalize if zero --- BTFSS PORTA,DN ; read UP input port bit 2 GOTO EQP6 ; equalize 3 if low --- DECF AMPLIT,1 ; advance if high 1 BSF HANDSH,0 ; and set lockout flag 1 GOTO VALIDA ; continue UPDATE at VALIDA (2+2=4) ; Pulse mode equalizing routines... EQP1 GOTO EQP1A ; equalize 1 2 EQP1A GOTO EQP2 ; equalize 2 2 EQP2 GOTO EQP3 ; equalize 2 2 EQP3 GOTO CKDNP ; continue at CKDNP 2 EQP4 NOP ; equalize 1 1 GOTO EQP5 ; equalize 2 2 EQP5 GOTO EQP6 ; equalize 2 **** 2 NOZERO dominates EQP6 NOP ; equalize 3 1 GOTO VALIDA ; continue at VALIDA 2 ; ================ PRECISION DELAY ON PAGE THREE ================== ; STALL is a special full page table lookup for low latency time delays ; accurate to one cycle. It delays w + 6 cycles. w can range from 0 to 255. ; APAD and DPAD are fixed delays that fall through to STALL. ; Note that five bytes are also required at the end of page two. ; PCLATH must be preset to page three. Note that the subtraction automatically ; lands on page three because of a preset PCLATH. ; Note also that a PCL change of zero advances you to the NEXT opcode. ORG 0x2FB ; uses all of page three plus five prebytes APAD MOVLW APADVAL ; fixed A padding delay GOTO STALL ; 3 extra cycles for 9 ovh total DPAD MOVLW DPADVAL ; fixed D padding delay 7 total STALL SUBWF PCL,1 ; relative jump to data Must be in location x00 -2 !!! NOP NOP ; must be first byte on page NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location 0F NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location 1F NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location 2F NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location 3F NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location 4F NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location 5F NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location 6F NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location 7F NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location 8F NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location 9F NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location AF NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location BF NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location CF NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location DF NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP ; location EF NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP RETLW 00 ; location FF ~must~ be end of page. ; ============== TABLES ON PAGES FOUR THROUGH SEVEN =============== ; There is also approximately 200 bytes of free and unused space remaining in ; four 50 byte blocks. ; Note that the delay tables are not yet fully populated nor have they been ; distortion optimized. This is preliminary development code only. ; Contact don@tinaja.com for commercially available & fully functional products. ; GETDLYA is the table lookup for group A for pregroup delay. This group ; requires byte expansion of 14*(100-AMPLIT). Its overhead is 7 bytes. ; Only certain amplitudes are presently usable. ; 101+2 bytes must not cross a page boundary. ; Delay B continues sequentially on page 4. ORG 0x400 ; start page four OVHA EQU 202 ; overhead to be subtracted GETDLYA MOVF AMPLIT,0 ; get amplitude ADDWF PCL,1 ; relative jump to data RETLW 300-OVHA ; Amplitude 0 Arguments MUST be positive! RETLW 410-OVHA ; Amplitude 1 898*2 - 14*(100-1) = 410 [1796] RETLW 406-OVHA ; Amplitude 2 889*2 - 14*(100-2) = 406 [1778] RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 5 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 392-OVHA ; Amplitude 10 826*2 - 14*(100-10) = 392 [1652] RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 15 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 372-OVHA ; Amplitude 20 746*2 - 14*(100-20) = 372 [1492] RETLW 300-OVHA ; Amplitude 21 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 25 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 352-OVHA ; Amplitude 30 666*2 -14*(100-30) = 352 [1332] RETLW 300-OVHA ; Amplitude 31 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 35 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 332-OVHA ; Amplitude 40 586*2 - 14*(100-40) = 332 [1172] RETLW 300-OVHA ; Amplitude 41 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 45 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 312-OVHA ; Amplitude 50 506*2 -14*(100-50) = 312 [1012] [1012] RETLW 300-OVHA ; Amplitude 51 RETLW 300-OVHA RETLW 308-OVHA ; Amplitude 53 483*2 - 14*(100-53) = 308 VERIFIED [966] RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 55 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 294-OVHA ; Amplitude 60 427*2 - 14*(100-60) = 294 [854] RETLW 300-OVHA ; Amplitude 61 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 65 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 70 RETLW 300-OVHA ; Amplitude 71 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 75 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 80 RETLW 300-OVHA ; Amplitude 81 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 85 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 236-OVHA ; Amplitude 90 188*2 - 14*(100-90) = 236 [376] RETLW 300-OVHA ; Amplitude 91 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA ; Amplitude 95 RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 300-OVHA RETLW 216-OVHA ; Amplitude 100 108*2 - 14*(100-100) = 216 [216] ; GETDLYB is the table lookup for group B for pulses p5 and p6%. This group ; requires byte expansion of AMPLIT*11 but ONLY for AMPLIT>16. ; Overhead is 20 cycles for high amplitudes and 15 cycles for low. ; GroupB covers all amplitudes. Amplitude 1 is approximated. ; 101+2 bytes must not cross a page boundary. ; Total group h overhead is presently 17/22 cycles. ; Delay B continues sequentially on page 4. OVHB EQU 22 ; overhead to be subtracted for AMPL>16 OVHBT EQU 17 ; overhead to be subtracted for AMPL=<16 GETDLYB MOVF AMPLIT,0 ; get amplitude ADDWF PCL,1 ; relative jump to data RETLW 100-OVHBT ; Amplitude 0 Arguments MUST be positive RETLW 17-OVHBT ; 14 + no expansion !! 17 MINIMUM APPROXIMATION !! RETLW 29-OVHBT ; 29 + no expansion RETLW 100-OVHBT RETLW 100-OVHBT RETLW 100-OVHBT ; Amplitude RETLW 100-OVHBT RETLW 100-OVHBT RETLW 100-OVHBT RETLW 100-OVHBT RETLW 143-OVHBT ; Amplitude 10 approx 143 RETLW 100-OVHBT RETLW 100-OVHBT RETLW 100-OVHBT RETLW 100-OVHBT RETLW 100-OVHBT ; Amplitude 15 approx 214 RETLW 100-OVHBT ; Amplitude 16 approx 228 RETLW 100-OVHBT ; Amplitude 17 approx 243 - 17*11 = 56 RETLW 100-OVHB RETLW 100-OVHB RETLW 66-OVHB ; Amplitude 20 286 - 11*20 --> 66 RETLW 100-OVHB ; Amplitude 21 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 25 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 97-OVHB ; Amplitude 30 427 - 11*30 ---> 97 RETLW 100-OVHB ; Amplitude 31 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 35 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 40 RETLW 100-OVHB ; Amplitude 41 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 45 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 50 RETLW 100-OVHB ; Amplitude 51 RETLW 100-OVHB RETLW 161-OVHB ; Amplitude53 744 - 11*53 = 161 RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 55 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 60 RETLW 100-OVHB ; Amplitude 61 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 65 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 70 RETLW 100-OVHB ; Amplitude 71 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 75 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 80 RETLW 100-OVHB ; Amplitude 81 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 85 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 90 RETLW 100-OVHB ; Amplitude 91 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB ; Amplitude 95 RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 100-OVHB RETLW 196-OVHB ; Amplitude 100 1296 - 100*11 = 196 ; GETDLYC is the table lookup for group C for pulses p1 and p6%. This group ; requires no byte expansion. ; 101+2 bytes must not cross a page boundary. ; Total group h overhead is presently 9 cycles. ; Delay C opens page 5. ORG 0x500 ; start of next page OVHC EQU 9 ; overhead to be subtracted GETDLYC MOVF AMPLIT,0 ; get amplitude ADDWF PCL,1 ; relative jump to data RETLW 100-OVHC ; Amplitude 0 Arguments MUST be positive! RETLW 9-OVHC ; Amplitude 1 2 is badly approximated [9] RETLW 9-OVHC ; Amplitude 2 5 is badly approximated [9] RETLW 9-OVHC ; Amplitude 3 8 approximated by [9] needs checked RETLW 10-OVHC ; Amplitude 4 approximately 10 RETLW 12 -OVHC ; Amplitude 5 approximately 12 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 24-OVHC ; Amplitude 10 24 RETLW 100-OVHC ; RETLW 100-OVHC ; RETLW 100-OVHC ; RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 15 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 20 RETLW 100-OVHC ; Amplitude 21 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 25 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 30 RETLW 100-OVHC ; Amplitude 31 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 35 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 40 RETLW 100-OVHC ; Amplitude 41 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 45 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 50 RETLW 100-OVHC ; Amplitude 51 RETLW 100-OVHC RETLW 134-OVHC ; Amplitude 53 134 ONLY ONE ALLOWED! RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 55 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 60 RETLW 100-OVHC ; Amplitude 61 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 65 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 70 RETLW 100-OVHC ; Amplitude 71 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 75 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 80 RETLW 100-OVHC ; Amplitude 81 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 85 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 90 RETLW 100-OVHC ; Amplitude 91 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC ; Amplitude 95 RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 100-OVHC RETLW 159-OVHC ; Amplitude 100 159 ; GETDLYD is the table lookup for group D for intergroup delay. This group ; requires byte expansion of 16*(100-AMPLIT). ; Only amplitude 0.53 is presently usable. ; 101+2 bytes must not cross a page boundary. ; Total group h overhead is presently 61 cycles. ; Delay D continues sequentially on page 5. OVHD EQU 61 ; overhead to be subtracted GETDLYD MOVF AMPLIT,0 ; get amplitude ADDWF PCL,1 ; relative jump to data RETLW 100-OVHD ; Amplitude 0 Arguments MUST be positive! RETLW 227-OVHD ; Amplitude 1 1811 - 16*(100-1) = 227 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 5 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 10 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 15 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 20 RETLW 100-OVHD ; Amplitude 21 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 25 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 30 RETLW 100-OVHD ; Amplitude 31 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 35 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 40 RETLW 100-OVHD ; Amplitude 41 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 45 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 136-OVHD ; Amplitude 50 936 - 16*(100-50) = 136 LOW BY FOUR????? RETLW 100-OVHD ; Amplitude 51 RETLW 100-OVHD RETLW 132-OVHD ; Amplitude 53 884 - 16*(100-53) = 132 VERIFIED RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 55 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 122-OVHD ; Amplitude 60 762 - 16*(100-60) = 122 RETLW 100-OVHD ; Amplitude 61 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 65 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 70 RETLW 100-OVHD ; Amplitude 71 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 75 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 80 RETLW 100-OVHD ; Amplitude 81 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 85 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD ; Amplitude 90 240 - 16*(100-90) = 80 RETLW 100-OVHD ; Amplitude 91 RETLW 100-OVHD RETLW 100-OVHD RETLW 100-OVHD RETLW 73-OVHD ; Amplitude 95 153 - 16*(100-95) = 73 RETLW 100-OVHD RETLW 100-OVHD RETLW 69-OVHD ; Amplitude 98 101 - 16*(100-98) = 69 RETLW 68-OVHD ; Amplitude 99 84 - 16*(100-99) = 68 RETLW 67-OVHD ; Amplitude 100 67 - 16*(100-100) = 67 ; GETDLYE is the table lookup for group E for p3 and p7%. Its overhead is 7 bytes. ; Amplitudes 1,2, and 3 are not realizable. Amplitude 4 is an approximation. ; 101+2 bytes must not cross a page boundary. ; Total group E overhead is presently 9 cycles. ; Delay E opens page 6. ORG 0x600 OVHE EQU 9 ; overhead to be subtracted GETDLYE MOVF AMPLIT,0 ; get amplitude ADDWF PCL,1 ; relative jump to data RETLW 100-OVHE ; Amplitude 0 Arguments MUST be positive! RETLW 9-OVHE ; Amplitude 1 is badly approximated RETLW 9-OVHE ; Amplitude 2 is badly approximated RETLW 9-OVHE ; Amplitude 3 is badly approximated RETLW 9-OVHE ; Amplitude 4 approximation 9 should be about 7 RETLW 9-OVHE ; Amplitude 5 approx 9 = minimum RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 18-OVHE ; Amplitude 10 18 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 15 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 20 RETLW 100-OVHE ; Amplitude 21 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 25 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 30 RETLW 100-OVHE ; Amplitude 31 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 35 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 40 RETLW 100-OVHE ; Amplitude 41 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 45 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 50 RETLW 100-OVHE ; Amplitude 51 RETLW 100-OVHE RETLW 65-OVHE ; Amplitude 53 65 RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 55 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 60 RETLW 100-OVHE ; Amplitude 61 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 65 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 70 RETLW 100-OVHE ; Amplitude 71 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 75 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 80 RETLW 100-OVHE ; Amplitude 81 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 85 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 90 RETLW 100-OVHE ; Amplitude 91 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE ; Amplitude 95 RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 100-OVHE RETLW 218-OVHE ; Amplitude 100 218 ; GETDLYF is the table lookup for group F for p4 and p7%. This group ; requires byte expansion of asdfasdf. Its overhead is 7 bytes. ; Amplitude 1 is not usable. ; 101+2 bytes must not cross a page boundary. ; Total group h overhead is presently 17 (below)/22 cycles. ; Delay F follows sequentially on page 6 OVHF EQU 22 ; overhead to be subtracted OVHFL EQU 17 ; low amplitude 16 overhead GETDLYF MOVF AMPLIT,0 ; get amplitude ADDWF PCL,1 ; relative jump to data RETLW 100-OVHFL ; Amplitude 0 Arguments MUST be positive! RETLW 17-OVHFL ; Amplitude 1 11 badly approximated RETLW 22-OVHFL ; Amplitude 2 22 accurate RETLW 100-OVHFL RETLW 100-OVHFL RETLW 55-OVHFL ; Amplitude 5 approx 55 RETLW 100-OVHFL RETLW 100-OVHFL RETLW 100-OVHFL RETLW 100-OVHFL RETLW 110-OVHFL ; Amplitude 10 110 RETLW 100-OVHFL RETLW 100-OVHFL RETLW 100-OVHFL RETLW 100-OVHFL RETLW 100-OVHFL ; Amplitude 15 RETLW 175-OVHFL ; Amplitude 16 approx 175 RETLW 50-OVHF ; Amplitude 17 approx 186 - 8*17 = 50 RETLW 100-OVHF RETLW 100-OVHF RETLW 59-OVHF ; Amplitude 20 219 - 8*20 = 59 RETLW 100-OVHF ; Amplitude 21 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 25 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 30 RETLW 100-OVHF ; Amplitude 31 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 35 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 40 RETLW 100-OVHF ; Amplitude 41 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 45 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 50 RETLW 100-OVHF ; Amplitude 51 RETLW 100-OVHF RETLW 138-OVHF ; Amplitude 53 562 - 8*53 = 138 RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 55 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 60 RETLW 100-OVHF ; Amplitude 61 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 65 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 70 RETLW 100-OVHF ; Amplitude 71 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 75 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 80 RETLW 100-OVHF ; Amplitude 81 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 85 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 90 RETLW 100-OVHF ; Amplitude 91 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF ; Amplitude 95 RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 100-OVHF RETLW 224-OVHF ; Amplitude 100 1024 - 8*100 = 224 ; GETDLYG is the table lookup for group G for p3 and p7%. This group ; requires byte expansion of 5*AMPLIT. Its overhead is 7 bytes. ; Amplitudes 1 and 2 not usable, 3 is very marginal. ; 101+2 bytes must not cross a page boundary. ; Total group h overhead is presently 17/22 cycles with threshold at 40 ; Delay G opens page 7. ORG 0x700 OVHG EQU 22 ; overhead to be subtracted OVHGT EQU 17 ; low overhead to be subtracted 16 OR LESS GETDLYG MOVF AMPLIT,0 ; get amplitude ADDWF PCL,1 ; relative jump to data RETLW 100-OVHGT ; Amplitude 0 Arguments MUST be positive! RETLW 17-OVHGT ; Amplitude 1 4 VERY BAD APPROX 17 RETLW 17-OVHGT ; Amplitude 2 7 VERY BAD APPROX 17 RETLW 17-OVHGT ; Amplitude 3 approx 15 APPROX 17 RETLW 20-OVHGT ; Amplitude 4 approx 20 RETLW 26-OVHGT ; Amplitude 5 approx 26 RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT RETLW 51-OVHGT ; Amplitude 10 51 RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT ; Amplitude 15 RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT ; Amplitude 20 RETLW 100-OVHGT ; Amplitude 21 RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT ; Amplitude 25 RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT RETLW 166-OVHGT ; Amplitude 30 166 RETLW 100-OVHGT ; Amplitude 31 RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT ; Amplitude 35 RETLW 100-OVHGT ; RETLW 100-OVHGT RETLW 100-OVHGT RETLW 100-OVHGT RETLW 231-OVHGT ; Amplitude 40 231 threshold limit RETLW 100-OVHG ; Amplitude 41 RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG ; Amplitude 45 RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG ; Amplitude 50 RETLW 100-OVHG ; Amplitude 51 RETLW 100-OVHG RETLW 59-OVHG ; Amplitude 53 324 - 5*53 = 59 RETLW 100-OVHG RETLW 100-OVHG ; Amplitude 55 RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG ; Amplitude 60 RETLW 100-OVHG ; Amplitude 61 RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG ; Amplitude 65 RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG ; Amplitude 70 RETLW 100-OVHG ; Amplitude 71 RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG ; Amplitude 75 RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG ; Amplitude 80 RETLW 100-OVHG ; Amplitude 81 RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG ; Amplitude 85 RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG ; Amplitude 90 RETLW 100-OVHG ; Amplitude 91 RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG ; Amplitude 95 RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 100-OVHG RETLW 227-OVHG ; Amplitude 100 727 - 5*100 = 227 ; GETDLYH2 is the table lookup for group H, the post pulse delay. This group ; requires byte expansion of 16(100-AMPLIT0. Its overhead is 29/33 bytes. ; 101+2 bytes must not cross a page boundary. ; Total group h overhead is presently ASDFASDF cycles. ; This routine will hang on a delay request of VAL - OVHC = 00! ; Delay H follows sequentially on mid page 7. OVHH EQU 33 ; overhead to be subtracted active OVHHT EQU 29 ; overhead to be subtracted above threshold GETDLYH2 MOVF AMPLIT,0 ; get amplitude ADDWF PCL,1 ; relative jump to data RETLW 100-OVHH ; Amplitude 0 Arguments MUST be positive! RETLW 100-OVHH ; Amplitude 1 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 5 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 10 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 15 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 20 RETLW 100-OVHH ; Amplitude 21 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 25 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 30 RETLW 100-OVHH ; Amplitude 31 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 35 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 40 RETLW 100-OVHH ; Amplitude 41 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 45 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 50 RETLW 100-OVHH ; Amplitude 51 RETLW 100-OVHH RETLW 104-OVHH ; Amplitude 53 428*2=856 - 16*(100-53)= 104 RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 55 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 60 RETLW 100-OVHH ; Amplitude 61 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 65 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 70 RETLW 100-OVHH ; Amplitude 71 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 75 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 80 RETLW 100-OVHH ; Amplitude 81 RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH RETLW 100-OVHH ; Amplitude 85 RETLW 100-OVHH RETLW 36-OVHH ; Amplitude 87 approx 122*2 - 16*(100-87) = 36 RETLW 100-OVHHT ; Amplitude 88 approx 113*2 = 226 RETLW 100-OVHHT ; Amplitude 89 approx 104*2 = 208 RETLW 180-OVHHT ; Amplitude 90 95*2 = 180 RETLW 100-OVHHT ; Amplitude 91 RETLW 100-OVHHT RETLW 100-OVHHT RETLW 100-OVHHT RETLW 100-OVHHT ; Amplitude 95 100 RETLW 100-OVHHT RETLW 100-OVHHT RETLW 44-OVHHT ; Amplitude 98 22*2=44 RETLW 100-OVHHT ; Amplitude 99 fixed at 26 - sub not called RETLW 100-OVHH ; Amplitude 100 fixed at 8 - sub not called ; End of listing